Visible to Intel only — GUID: iga1418771639113
Ixiasoft
Visible to Intel only — GUID: iga1418771639113
Ixiasoft
3.4.2.14.7. The eccinj Register
The eccinj register injects 1 and 2 bit errors to the Nios® II processor’s internal RAM blocks that support ECC. Injecting errors allows the software to test the ECC error exception handling code. The error(s) are injected in the data bits, not the parity bits. The eccinj register is only available when ECC is present.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved | DC WB | DTCM 3 | DTCM 2 | ||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DTCM 1 | DTCM 0 | TLB | DC DAT | DC TAG | ICDAT | ICTAG | RF |
Software writes 0x1 to inject a 1 bit ECC error or 0x2 to inject a 2-bit ECC error to the RAM field. Hardware sets the value of the inject field to 0x0 after the error injection has occurred.
Field | Description | Access | Reset | Available |
---|---|---|---|---|
RF | Inject an ECC error in the register file’s RAM. | Read/Write | 0 | Only with ECC |
ICTAG | Inject an ECC error in the instruction cache Tag RAM. | Read/Write | 0 | Only with ECC |
ICDAT | Inject an ECC error in the instruction cache data RAM. | Read/Write | 0 | Only with ECC |
DCTAG | Inject ECC error in data cache tag RAM. | Read/Write | 0 | |
DCDAT | Inject an ECC error in the data cache data RAM. Injection occurs on next store instruction that writes the data cache or the next line fill. | Read/Write | 0 | |
TLB | Inject an ECC error in the MMU TLB RAM. Errors are injected in the tag portion of the VPN field. | Read/Write | 0 | Only with ECC |
DTCM0 | Inject ECC error in DTCM0. Injection occurs on next store instruction that writes this DTCM. | Read/Write | 0 | |
DTCM1 | Inject ECC error in DTCM1. Injection occurs on next store instruction that writes this DTCM. | Read/Write | 0 | |
DTCM2 | Inject ECC error in DTCM2. Injection occurs on next store instruction that writes this DTCM. | Read/Write | 0 | |
DTCM3 | Inject ECC error in DTCM3. Injection occurs on next store instruction that writes this DTCM. | Read/Write | 0 | |
DC WB | Inject ECC error in data cache victim line buffer RAM. Injection occurs on the first word written into the victim buffer RAM when a dirty line is being written back. | Read/Write | 0 |
Refer to “Working with ECC” for more information about when errors are injected.
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