Nios® II Processor Reference Guide

ID 683836
Date 10/22/2020
Public
Document Table of Contents

1.3. Customizing Nios® II Processor Designs

In practice, most FPGA designs implement some extra logic in addition to the processor system. Intel FPGAs provide flexibility to add features and enhance performance of the Nios® II processor system. You can also eliminate unnecessary processor features and peripherals to fit the design in a smaller, lower-cost device.

Because the pins and logic resources in Intel FPGA devices are programmable, many customizations are possible:

  • You can rearrange the pins on the chip to simplify the board design. For example, you can move address and data pins for external SDRAM memory to any side of the chip to shorten board traces.
  • You can use extra pins and logic resources on the chip for functions unrelated to the processor. Extra resources can provide a few extra gates and registers as glue logic for the board design; or extra resources can implement entire systems. For example, a Nios® II processor system consumes only 5% of a large Intel FPGA, leaving the rest of the chip’s resources available to implement other functions.
  • You can use extra pins and logic on the chip to implement additional peripherals for the Nios® II processor system. Intel FPGA offers a library of peripherals that easily connect to Nios® II processor systems.

Did you find the information on this page useful?

Characters remaining:

Feedback Message