2.2. Register File
The Nios® II processor can optionally have one or more shadow register sets. A shadow register set is a complete set of Nios II general-purpose registers. When shadow register sets are implemented, the CRS field of the status register indicates which register set is currently in use. An instruction access to a general-purpose register uses whichever register set is active.
A typical use of shadow register sets is to accelerate context switching. When shadow register sets are implemented, the Nios® II processor has two special instructions, rdprs and wrprs, for moving data between register sets. Shadow register sets are typically manipulated by an operating system kernel, and are transparent to application code. A Nios® II processor can have up to 63 shadow register sets.
The Nios II architecture allows for the future addition of floating-point registers.
For details about shadow register set implementation and usage, refer to “Registers” and “Exception Processing” in the Programming Model chapter of the Nios® II Processor Reference Handbook.
For details about the rdprs and wrprs instructions, refer to the Instruction Set Reference chapter of the Nios® II Processor Reference Handbook.