Nios® II Processor Reference Guide

ID 683836
Date 10/22/2020
Public
Document Table of Contents

2.7.1. JTAG Target Connection

The JTAG target connection provides the ability to connect to the processor through the standard JTAG pins on the Intel FPGA. This provides basic capabilities to start and stop the processor, and examine and edit registers and memory. The JTAG target connection is the minimum requirement for the Nios II flash programmer.
Note: While the processor has no minimum clock frequency requirements, Intel recommends that your design’s system clock frequency be at least four times the JTAG clock frequency to ensure that the on-chip instrumentation (OCI) core functions properly.

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