Nios® II Processor Reference Guide

ID 683836
Date 10/22/2020
Public
Document Table of Contents

8.5.64. mul

Instruction multiply
Operation

rC ←  (rA x rB) 31..0

Assembler Syntax

mul rC, rA, rB

Example

mul r6, r7, r8

Description

Multiplies rA times rB and stores the 32 low-order bits of the product to rC. The result is the same whether the operands are treated as signed or unsigned integers.

Nios® II processors that do not implement the mul instruction cause an unimplemented instruction exception.

Usage

Carry Detection (unsigned operands):

Before or after the multiply operation, the carry out of the MSB of rC can be detected using the following instruction sequence:

mul rC, rA, rB

mulxuu rD, rA, rB

cmpne rD, rD, r0

# The mul operation (optional)

# rD is nonzero if carry occurred

# rD is 1 if carry occurred, 0 if not

The mulxuu instruction writes a nonzero value into rD if the multiplication of unsigned numbers generates a carry (unsigned overflow). If a 0/1 result is desired, follow the mulxuu with the cmpne instruction.

Overflow Detection (signed operands):

After the multiply operation, overflow can be detected using the following instruction sequence:

mul rC, rA, rB

cmplt rD, rC, r0

mulxss rE, rA, rB

add rD, rD, rE

cmpne rD, rD, r0

# The original mul operation

# rD is nonzero if overflow

# rD is 1 if overflow, 0 if not

The cmplt–mulxss–add instruction sequence writes a nonzero value into rD if the product in rC cannot be represented in 32 bits (signed overflow). If a 0/1 result is desired, follow the instruction sequence with the cmpne instruction.

Exceptions

Unimplemented instruction

Instruction Type

R

Instruction Fields

A = Register index of operand rA

B = Register index of operand rB

C = Register index of operand rC

Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
A B C 0x27
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0x27 0 0x3a

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