Nios® II Processor Reference Guide

ID 683836
Date 10/22/2020
Public
Document Table of Contents

4.3.4. Tightly-coupled Memories

Number of tightly coupled instruction master port(s) (Include tightly coupled instruction master port(s))—Specifies one to four tightly-coupled instruction master ports for the Nios® II processor. In Platform Designer, select the number from the Number of tightly coupled instruction master port(s) list. Tightly coupled memory ports appear on the connection panel of the Nios® II processor on the Platform Designer System Contents tab. You must connect each port to exactly one memory component in the system.

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