Nios® II Processor Reference Guide

ID 683836
Date 10/22/2020
Public
Document Table of Contents

3.7.7.11. Fast TLB Miss

Fast TLB miss exceptions are implemented only in Nios® II processors that include the MMU. The MMU has a special exception vector (fast TLB miss), specified with the Nios® II Processor parameter editor in Platform Designer, specifically to handle TLB miss exceptions quickly. Whenever the processor cannot find a TLB entry matching the VPN (optionally extended by a process identifier), the result is a TLB miss exception. At the time of the exception, the processor first checks status.EH. When status.EH = 0, no other exception is already in process, so the processor considers the TLB miss a fast TLB miss, sets status.EH to one, and transfers control to the fast TLB miss exception handler (rather than to the general exception handler).

There are two kinds of fast TLB miss exceptions:

  • Fast TLB miss (instruction)—Any instruction fetch can cause this exception.
  • Fast TLB miss (data)—Load, store, initda, and flushda instructions can cause this exception.

The fast TLB miss exception handler can inspect the tlbmisc.D field to determine which kind of fast TLB miss exception occurred.

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