Nios® II Processor Reference Guide

ID 683836
Date 10/22/2020
Public
Document Table of Contents

3.4.2.2. The estatus Register

The estatus register holds a saved copy of the status register during nonbreak exception processing.
Table 13.  estatus Control Register Fields
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved RSIE NMI PRS
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CRS IL IH EH U PIE

All fields in the estatus register have read/write access. All fields reset to 0.

When the Nios® II processor takes an interrupt, if status.eh is zero (that is, the MMU is in nonexception mode), the processor copies the contents of the status register to estatus.

Note: If shadow register sets are implemented, and the interrupt requests a shadow register set, the Nios® II processor copies status to sstatus, not to estatus.

For details about the sstatus register, refer to The sstatus Register section.

The exception handler can examine estatus to determine the pre-exception status of the processor. When returning from an exception, the eret instruction restores the pre-exception value of status. The instruction restores the pre-exception value by copying either estatus or sstatus back to status, depending on the value of status.CRS.

Refer to the Exception Processing section for more information.

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