Nios® II Processor Reference Guide

ID 683836
Date 10/22/2020
Public
Document Table of Contents

2.7.6. Trace Capture

Trace capture refers to ability to record the instruction-by-instruction execution of the processor as it executes code in real-time. The JTAG debug module offers the following trace features:
  • Capture execution trace (instruction bus cycles).
  • Capture data trace (data bus cycles).
  • For each data bus cycle, capture address, data, or both.
  • Start and stop capturing trace in real time, based on triggers.
  • Manually start and stop trace under host control.
  • Optionally stop capturing trace when trace buffer is full, leaving the processor executing.
  • Store trace data in on-chip memory buffer in the JTAG debug module. (This memory is accessible only through the JTAG connection.)
  • Store trace data to larger buffers in an off-chip debug probe.

Certain trace features require additional licensing or debug tools from third-party debug providers. For example, an on-chip trace buffer is a standard feature of the Nios® II processor, but using an off-chip trace buffer requires additional debug software and hardware provided by Imagination Technologies™, LLC or Lauterbach GmbH.

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