Nios® II Processor Reference Guide

ID 683836
Date 10/22/2020
Public
Document Table of Contents

8.3. Assembler Pseudo-Instructions

Pseudo-instructions are used in assembly source code like regular assembly instructions. Each pseudo-instruction is implemented at the machine level using an equivalent instruction. The movia pseudo-instruction is the only exception, being implemented with two instructions. Most pseudo-instructions do not appear in disassembly views of machine code.
Table 92.  Assembler Pseudo-Instructions
Pseudo-Instruction Equivalent Instruction
bgt rB, rA, label blt rA, rB, label
bgtu rB, rA, label bltu rA, rB, label
ble rB, rA, label bge rA, rB, label
bleu rB, rA, label bgeu rA, rB, label
cmpgt rC, rB, rA cmplt rC, rA, rB
cmpgti rB, rA, IMMED cmpgei rB, rA, (IMMED+1)
cmpgtu rC, rB, rA cmpltu rC, rA, rB
cmpgtui rB, rA, IMMED cmpgeui rB, rA, (IMMED+1)
cmple rC, rB, rA cmpge rC, rA, rB
cmplei rB, rA, IMMED cmplti rB, rA, (IMMED+1)
cmpleu rC, rB, rA cmpgeu rC, rA, rB
cmpleui rB, rA, IMMED cmpltui rB, rA, (IMMED+1)
mov rC, rA add rC, rA, r0
movhi rB, IMMED orhi rB, r0, IMMED
movi rB, IMMED addi, rB, r0, IMMED
movia rB, label orhi rB, r0, %hiadj(label)

addi, rB, r0, %lo(label)

movui rB, IMMED ori rB, r0, IMMED
nop add r0, r0, r0
subi rB, rA, IMMED addi rB, rA, (-IMMED)

Refer to the Application Binary Interface chapter of the Nios® II Processor Reference Handbook for more information about global pointers.

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