Nios® II Processor Reference Guide

ID 683836
Date 8/28/2023
Document Table of Contents Accessing Tightly-Coupled Memory

Tightly-coupled memories occupy normal address space, the same as other memory devices connected via system interconnect fabric. The address ranges for tightly-coupled memories (if any) are determined at system generation time.
Software accesses tightly-coupled memory using regular load and store instructions. From the software’s perspective, there is no difference accessing tightly-coupled memory compared to other memory.
Note: The tightly-coupled master requires a fixed memory latency of 1 cycle. Hence, the transaction with a slave in a different clock domain may not be successful since the transfer would take more than 1 cycle.