Visible to Intel only — GUID: iga1409336536322
Ixiasoft
Visible to Intel only — GUID: iga1409336536322
Ixiasoft
3.7.9.3. Exception Flow with the Internal Interrupt Controller
Interrupts can be re-enabled by writing one to the PIE bit, thereby allowing the current ISR to be interrupted. Typically, the exception routine adjusts ienable so that IRQs of equal or lower priority are disabled before re-enabling interrupts.
Refer to "Handling Nested Exceptions” for more information.