External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Document Table of Contents

9.1. Block Description

The following figure shows a block diagram of the QDR-IV controller architecture.
Figure 163. QDR-IV Controller Architecture Block Diagram
Note: To achieve maximum performance for a QDR-IV interface on an Arria 10 device, read data bus inversion must be enabled.

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