External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

5.6. Document Revision History

Date Version Changes
May 2017 2017.05.08 Rebranded as Intel.
October 2016 2016.10.31 Maintenance release.
May 2016 2016.05.02 Maintenance release.
November 2015 2015.11.02 Maintenance release.
May 2015 2015.05.04 Maintenance release.
December 2014 21014.12.15 Maintenance release.
August 2014 2014.08.15
  • Updated descriptions of mp_cmd_reset_n_#_reset_n, mp_rfifo_reset_n_#_reset_n, and mp_wfifo_reset_n_#_reset_n in the MPFE Signals table.
  • Added Reset section to Hard Memory Controller section.
December 2013 2013.12.16
  • Added footnote about command FIFOs to MPFE Signals table.
  • Added information about FIFO depth for the MPFE.
  • Added information about hard memory controller bonding.
  • Reworded protocol-support information for Arria V and Cyclone V devices.
November 2012 2.1
  • Added Hard Memory Interface Implementation Guidelines.
  • Moved content of EMI-Related HPS Features in SoC Devices section to chapter 4, Functional Description—HPS Memory Controller.

June 2012 2.0
  • Added EMI-Related HPS Features in SoC Devices.
  • Added LPDDR2 support.
  • Added Feedback icon.
November 2011 1.0 Initial release.

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