External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

6.12.1.4. AXI Port

The AXI port uses an AXI-3 interface. Each configured AXI port consists of the signals listed in the following table. Because the AXI protocol allows simultaneous read and write commands to be issued, two SDRAM control ports are required to form an AXI interface.
Table 81.  AXI Port Signals
Name Bits Direction Channel Function
ARESETn 1 In n/a Reset
ACLK 1 In n/a Clock
AWID 4 In Write address Write identification tag
AWADDR 32 In Write address Write address
AWLEN 4 In Write address Write burst length
AWSIZE 3 In Write address Width of the transfer size
AWBURST 2 In Write address Burst type
AWLOCK 2 In Write address Lock type signal which indicates if the access is exclusive; valid values are 0x0 (normal access) and 0x1 (exclusive access)
AWCACHE 4 In Write address Cache policy type
AWPROT 3 In Write address Protection-type signal used to indicate whether a transaction is secure or non-secure
AWREADY 1 Out Write address Indicates ready for a write command
AWVALID 1 In Write address Indicates valid write command.
WID 4 In Write data Write data transfer ID
WDATA 32, 64, 128 or 256 In Write data Write data
WSTRB 4, 8, 16, 32 In Write data Byte‑based write data strobe. Each bit width corresponds to 8 bit wide transfer for 32‑bit wide to 256‑bit wide transfer.
WLAST 1 In Write data Last transfer in a burst
WVALID 1 In Write data Indicates write data and strobes are valid
WREADY 1 Out Write data Indicates ready for write data and strobes
BID 4 Out Write response Write response transfer ID
BRESP 2 Out Write response Write response status
BVALID 1 Out Write response Write response valid signal
BREADY 1 In Write response Write response ready signal
ARID 4 In Read address Read identification tag
ARADDR 32 In Read address Read address
ARLEN 4 In Read address Read burst length
ARSIZE 3 In Read address Width of the transfer size
ARBURST 2 In Read address Burst type
ARLOCK 2 In Read address Lock type signal which indicates if the access is exclusive; valid values are 0x0 (normal access) and 0x1 (exclusive access)
ARCACHE 4 In Read address Lock type signal which indicates if the access is exclusive; valid values are 0x0 (normal access) and 0x1 (exclusive access)
ARPROT 3 In Read address Protection-type signal used to indicate whether a transaction is secure or non-secure
ARREADY 1 Out Read address Indicates ready for a read command
ARVALID 1 In Read address Indicates valid read command
RID 4 Out Read data Read data transfer ID
RDATA 32, 64, 128 or 256 Out Read data Read data
RRESP 2 Out Read data Read response status
RLAST 1 Out Read data Last transfer in a burst
RVALID 1 Out Read data Indicates read data is valid
RREADY 1 In Read data Read data channel ready signal

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