External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

10.7.8. QDR II and QDR II+ Resource Utilization in Arria II GZ, Arria V GZ, Stratix III, Stratix IV, and Stratix V Devices

The following table shows typical resource usage of the QDR II and QDR II+ SRAM controllers with UniPHY in the current version of Quartus Prime software for Arria II GZ, Arria V GZ, Stratix III, Stratix IV, and Stratix V devices.
Table 78.  Resource Utilization in Arria II GZ, Arria V GZ, Stratix III, Stratix IV, and Stratix V Devices 

PHY Rate

Memory Width (Bits)

Combinational ALUTS

Logic Registers

Memory (Bits)

M9K Blocks

Half

9

602

641

0

0

18

883

1002

0

0

36

1457

1724

0

0

Full

9

586

708

0

0

18

851

1126

0

0

36

1392

1962

0

0