External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Document Table of Contents

5.3.5. Address and Command Decoding Logic

When the main state machine issues a command to the memory, it asserts a set of internal signals. The address and command decoding logic turns these signals into AFI-specific commands and address.

The following signals are generated:

  • Clock enable and reset signals: afi_cke, afi_rst_n
  • Command and address signals: afi_cs_n, afi_ba, afi_addr, afi_ras_n, afi_cas_n, afi_we_n