7.1.1. Avalon® -MM Slave Interface
The Avalon® -MM slave interface decomposes the Avalon® -MM address to the memory bank, column, and row addresses. The IP automatically maps the bank address to the LSB of the Avalon® address vector.
The Avalon® -MM slave interface includes a burst adaptor, which has two parts:
- The first part is a read and write request combiner that groups requests to sequential addresses into the native memory burst. Given that the second request arrives within the read and write latency window of the first request, the controller can combine and satisfy both requests with a single memory transaction.
- The second part is the burst divider in the front end of the Avalon® -MM interface, which breaks long Avalon bursts into individual requests of sequential addresses, which then pass to the controller state machine.
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