External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Document Table of Contents

11.7. Variable Controller Latency

The variable controller latency feature allows you to take advantage of lower latency for variations designed to run at lower frequency. When deciding whether to vary the controller latency from the default value of 1, be aware of the following considerations:

  • Reduced latency can help achieve a reduction in resource usage and clock cycles in the controller, but might result in lower fMAX.
  • Increased latency can help acheive greater fMAX, but might consume more clock cycles in the controller and result in increased resource usage.

If you select a latency value that is inappropriate for the target frequency, the system displays a warning message in the text area at the bottom of the parameter editor.

You can change the controller latency by altering the value of the Controller Latency setting in the Controller Settings section of the General Settings tab of the QDR II and QDR II+ SRAM Controller with UniPHY Intel FPGA IP parameter editor.