1.8. Shadow Registers
Prior to the introduction of shadow registers, the data valid window of a multi-rank interface was calibrated to the overlapping portion of the data valid windows of the individual ranks. The resulting data valid window for the interface would be smaller than the individual data valid windows, limiting overall performance.
Shadow registers allow the sequencer to calibrate each rank separately and fully, and then to save the calibrated settings for each rank in its own set of shadow registers, which are part of the IP scan chains. During a rank-to-rank switch, the rank-specific set of calibration settings is restored just-in-time to optimize the data valid window for each rank.
The following figure illustrates how the use of rank-specific calibration settings results in a data valid window appropriate for the current rank.
The shadow registers and their associated rank-switching circuitry are part of the device I/O periphery hardware.
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