External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

9.1.3.3. Traffic Generator Signals

The following table lists the signals used by the traffic generator.
Table 68.  Traffic Generator Signals 

Signal

Signal Type

clk

Input clock to traffic generator. For 28nm devices, use the AFI clock. For 20nm devices, use the emif_usr_clk.

reset_n

Active low reset input. For 28nm devices, typically connected to afi_reset_n. For 20nm devices, typically connectd to emif_usr_reset_n.

avl_ready

Refer to Avalon Interface Specification.

avl_write_req

Refer to Avalon Interface Specification.

avl_read_req

Refer to Avalon Interface Specification.

avl_addr

Refer to Avalon Interface Specification.

avl_size

Refer to Avalon Interface Specification.

avl_wdata

Refer to Avalon Interface Specification.

avl_rdata

Refer to Avalon Interface Specification.

avl_rdata_valid

Refer to Avalon Interface Specification.

pnf_per_bit

Output. Bitwise pass/fail for last traffic generator read compare of AFI interface. No errors produces value of all 1s.

pnf_per_bit_persist

Output. Cumulative bitwise pass/fail for all previous traffic generator read compares of AFI interface. No errors produces value of all 1s.

pass

Active high output when traffic generator tests complete successfully.

fail

Active high output when traffic generator test does not complete successfully.

test_complete

Active high output when traffic generator test completes.

For information about the Avalon signals and the Avalon interface, refer to Avalon Interface Specifications.