Visible to Intel only — GUID: sfo1411577354121
Ixiasoft
Visible to Intel only — GUID: sfo1411577354121
Ixiasoft
6.12.1.1. Avalon-MM Bidirectional Port
Name |
Bit Width |
Input/Output Direction |
Function |
---|---|---|---|
|
1 |
In |
Clock for the Avalon-MM interface |
|
1 |
In |
Indicates read transaction 8 |
|
1 |
In |
Indicates write transaction 8 |
|
32 |
In |
Address of the transaction |
|
32, 64, 128, or 256 |
Out |
Read data return |
|
1 |
Out |
Indicates the readdata signal contains valid data in response to a previous read request. |
|
32, 64, 128, or 256 |
In |
Write data for a transaction |
|
4, 8, 16, 32 |
In |
Byte enables for each write byte lane |
|
1 |
Out |
Indicates need for additional cycles to complete a transaction |
|
11 |
In |
Transaction burst length. The value of the maximum burstcount parameter must be a power of 2. |
The read and write interfaces are configured to the same size. The byte‑enable size scales with the data bus size.
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