Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Document Table of Contents

4.2.3. set_irq()


Prototype: set_irq()
Arguments: Verilog HDL: int interrupt_bit

VHDL: int interrupt_bit, bfm_id, req_if(bfm_id)

Returns: void

Asserts the interrupt signal and sets the interrupt signal to 1, regardless of the value you set for Assert IRQ high in the parameter editor.

Language Support: Verilog HDL, VHDL