Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

14.2.24. signal_min_transaction_queue_size

Prototype:

signal_min_transaction_queue_size

Arguments:

Verilog HDL: None

VHDL: N.A.

Arguments:

None.

Returns:

void

Description:

Triggers when the size of the pending queue falls below the minimum size.
Language support: Verilog HDL