Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

17.2.19. retrieve_instruction()

Prototype:

void retrieve_instruction.

Arguments:

Verilog HDL:

output ci_data_t dataa

VHDL:

output ci_data_t dataa

output ci_data_t datab output ci_data_t datab
output ci_n_t n output ci_n_t n
output ci_addr_t a output ci_addr_t a
output ci_addr_t b output ci_addr_t b
output ci_addr_t c output ci_addr_t c
output logic readra output logic readra
output logic readrb output logic readrb
output logic writerc output logic writerc
output ci_data_t idle output ci_data_t idle
  bfm_id
  req_if(bfm_id)

Returns:

void

Description:

A simplified API to retrieve instruction.
Language support: Verilog HDL, VHDL

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