Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public

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Document Table of Contents

16.2.1.27. set_instruction_readrb()

Prototype:

void set_instruction_readrb()

Arguments:

Verilog HDL: logic enable

VHDL: logic enable, bfm_id, req_if(bfm_id)

Returns:

void

Description:

Sets the instruction register file read b value.
Language support: Verilog HDL, VHDL