Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

7.2.29.41. set_command_transaction_mode()

Prototype:

set_command_transaction_mode()

Arguments:

Verilog HDL: int mode

VHDL: int mode, bfm_id, req_if(bfm_id)

Returns:

void

Description:

By default, write burst commands are consolidated into a single command transaction containing the write data for all burst cycles in that command. This mode is set when the mode argument equals 0. When the mode argument is set to 1, the default is overridden. Write burst commands yield one command transaction per burst cycle.
Language support: Verilog HDL, VHDL

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