Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

10.2.2. set_enable_a_less_than_max_channel()

Prototype:

set_enable_a_less_than_max_channel()

Arguments:

Verilog HDL: Boolean

VHDL: N.A.

Returns:

void

Description:

Enables an assertion that ensures that the value of the channel signal is less than the maximum number of channels.
Language support: Verilog HDL