Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

5.4.52. signal_response_complete

Prototype:

signal_response_complete

Arguments:

Verilog HDL: None

VHDL: N.A.

Returns:

void

Description:

Triggers when either signal_read_response_complete or signal_write_response_complete is triggered.
Language support: Verilog HDL

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