Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

6.4.18. get_pending_read_latency_cycle()

Prototype:

int get_pending_read_latency_cycle()

Arguments:

Verilog HDL: None

VHDL: pending_read_latency_cycle, bfm_id, req_if(bfm_id)

Returns:

int

Description:

Queries the read command queue to determine the cycles needed for the Slave BFM to complete the current read response. This method notifies the master when the Slave BFM is ready to receive a command.
Language support: Verilog HDL, VHDL