Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

5.4.35. set_command_debugaccess()

Prototype:

void set_command_debugaccess

Arguments:

Verilog HDL: bit state

VHDL: bit state, bfm_id, req_if(bfm_id)

Returns:

void

Description:

Controls the assertion or deassertion of the debugaccess interface signal. The debugaccess control is on transaction boundaries.
Language support: Verilog HDL, VHDL

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