Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

16.1. Parameters

Table 23.  Custom Instruction Master BFM Parameter Settings
Option Default Value Legal Values Description
General
Number of Operands to Use 2 0,1,2 Specifies the number of operands to use.
  • 0: no operands are used

  • 1: use dataa port only
  • 2: use dataa and datab ports
Fixed Length for Multi-cycle Mode 2 N/A Specifies the fixed length for multi-cycle mode.
Port Enables
Use Result Port On On/Off When On, the interface includes a result pin.
Use Multi-cycle Mode Off On/Off When On, the interface can include a start pin, a done pin , both pins, or neither pins. The result returns in any of the following conditions:
  • With a start signal—Result returns together with an instruction.
  • Without a start signal—Result returns with instruction on the bus at every clock cycle.
  • With a done signal—Result returns at any time.
  • Without a done signal—Result returns at a fixed cycle.
Using start port On On/Off When On, the interface includes a start pin.
Using done port On On/Off When On, the interface includes a done pin.
Use Extended Port Off On/Off When On, the interface includes a n pin.
Extended Port Width 1 N/A Specifies the width of the extended n port.
Use Internal Register a Off On/Off When On, the interface includes the readra and a pins.
Use Internal Register b Off On/Off When On, the interface includes the readrb and b pins.
Use Internal Register c Off On/Off When On, the interface includes the readrc and c pins.
Miscellaneous Properties
VHDL BFM ID 0 0–1023 For VHDL BFMs only. Use this option to assign a unique number to each BFM in the testbench design.