Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

7.2.8. set_enable_a_burst_legal()

Prototype:

set_enable_a_burst_legal()

Arguments:

Verilog HDL: Boolean

VHDL: N.A.

Returns:

void

Description:

Enables an assertion that ensures that the total number of assertions for the write and readdatavalid is the same as the burstcount for any burst transfer. Disabled when burst transfers are not supported.
Language support: Verilog HDL

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