Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

15.2. Parameters

Table 22.  External Memory BFM Parameter Settings
Option Default Value Legal Values Description
Port Enables
Use the byteenable signal On On/Off When On, the interface includes a byteenable pin to enable specific byte lanes during transfer.
Use the chip select signal On On/Off When On, the interface includes a chipselect pin. When present, the slave port ignores all Avalon-MM signals unless chipselect is asserted. chipselect is always present in combination with read or write.
Use the write signal On On/Off When On, the interface includes a write pin that enables the write-request signal.
Use the read signal On On/Off When On, the interface includes a read pin that enables the read-request signal.
Use the output enable signal On On/Off When On, the interface includes an outputenable pin.
Use the begintransfer signal On On/Off When On, the interface includes a begintransfer pin.
Use the reset input signal Off On/Off When On, the interface includes a reset pin.
Use the active low byteenable signal Off On/Off When On, the interface includes an active low byteenable pin.
Use the active low chipselect signal Off On/Off When On, the interface includes an active low chipselect_n pin.
Use the active low write signal Off On/Off When On, the interface includes an active low write_n pin.
Use the active low read signal Off On/Off When On, the interface includes an active low read_n pin.
Use the active low outputenable signal Off On/Off When On, the interface includes an active low outputenable_n pin.
Use the active low begintransfer signal Off On/Off When On, the interface includes an active low begintransfer_n pin.
Use the active low reset signal Off On/Off When On, the interface includes an active low reset_n pin.
Interface Signals Name
Address Role cdt_address N/A Specifies the conduit interface role name that matches the role name on the external memory device.
Data Role cdt_data_io N/A
Write Role cdt_write N/A
Read Role cdt_read N/A
Byteenable Role cdt_byteenable N/A
Chip Select Role cdt_chipselect N/A
Outputenable Role cdt_outputenable N/A
Begintransfer Role cdt_begintransfer N/A
Reset Role cdt_reset N/A
Port Widths
Address width 8 1–32 Specifies the address width in bits.
Symbol width 8 1–1024 Specifies the data symbol width in bits.
Number of symbols 4 1, 2, 4, 8, 16, 32, 64, 128 Specifies the number of symbols in a data.
Memory Contents
Memory Initialization altera_external_memory_bfm.hex N/A Specifies the file to initialize the memory content at the beginning of the simulation. The BFM supports only one memory file.
Interface Timing
Read Latency of Interface 0 N/A Specifies the read latency of the interface.
Miscellaneous Properties
VHDL BFM ID 0 0–1023 For VHDL BFMs only. Use this option to assign a unique number to each BFM in the testbench design.

Did you find the information on this page useful?

Characters remaining:

Feedback Message