Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

6.4.43. signal_fatal_error

Prototype:

signal_fatal_error

Arguments:

Verilog HDL: None

VHDL: N.A.

Returns:

void

Description:

Notifies the testbench that a fatal error has occurred in this module.
Language support: Verilog HDL