Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

7.2.22. set_enable_a_read_response_timeout()

Prototype:

set_enable_a_read_response_timeout()

Arguments:

Verilog HDL: Boolean

VHDL: N.A.

Returns:

void

Description:

Enables an assertion that ensures readdatavalid is asserted within maximum allowed timeout period. Disabled when either readdatavalid is not supported or the maximum allowed timeout period is less than 1.
Language support: Verilog HDL

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