Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

9.4.1. event_sink_ready_assert()

Prototype:

event_sink_ready_assert()

Arguments:

Verilog HDL: N.A.

VHDL: bfm_id

Returns:

void

Description:

Signals that the ready signal was asserted.
Language support: VHDL

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