Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

9.4.2. event_sink_ready_deassert()

Prototype:

event_sink_ready_deassert()

Arguments:

Verilog HDL: N.A.

VHDL: bfm_id

Returns:

void

Description:

Signals that the ready signal was deasserted.
Language support: VHDL