Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

8.4.5. event_src_ready()

Prototype:

event_src_ready()

Arguments:

Verilog HDL: N.A.

VHDL: bfm_id

Returns:

void

Description:

Notifies the testbench that the ready signal was asserted.
Language support: VHDL

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