Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

2.2.3. get_run_state()

Prototype:

get_run_state()

Arguments:

Verilog HDL: None

VHDL: N.A.

Returns:

bit

Description:

Returns the state of the clock source; 1=running, 0=stop.
Language support: Verilog HDL

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