Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

6.4.19. get_pending_write_latency_cycle()

Prototype:

int get__cycle()

Arguments:

Verilog HDL: None

VHDL: pending_write_latency, bfm_id, req_if(bfm_id)

Returns:

int

Description:

Queries the write command queue to determine the cycles needed for the Slave BFM to complete the current write response.
Language support: Verilog HDL, VHDL