Avalon Verification IP Suite: User Guide

ID 683439
Date 2/17/2022
Public
Document Table of Contents

18.1. Verifying Avalon-ST DUT

The following figure shows the testbench to verify the Avalon-ST Single-Clock FIFO buffer using the Avalon-ST Source and Sink BFMs.
The testbench includes the following components:
  • The Avalon Clock Source BFM provides the clock to the DUT.
  • The Reset Source BFM provides the reset to the DUT.
  • The Avalon-ST Source BFM connects to the DUT and drives transactions.
  • The Avalon-ST Sink BFM monitors transactions from the Avalon-ST Single-Clock FIFO buffer.
  • The test program controls the BFMs using the BFM API to drive and monitor transactions.
    Figure 26. Top-Level Testbench for Avalon-ST DUT Component

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