External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

3.8. Arria® 10 EMIF Sequencer

The Arria® 10 EMIF sequencer is fully hardened in silicon, with executable code to handle protocols and topologies. Hardened RAM contains the calibration algorithm.

The Arria® 10 EMIF sequencer is responsible for the following operations:

  • Initializes memory devices.
  • Calibrates the external memory interface.
  • Governs the hand-off of control to the memory controller.
  • Handles recalibration requests and debug requests.
  • Handles all supported protocols and configurations.
Figure 101.  Arria® 10 EMIF Sequencer Operation


Did you find the information on this page useful?

Characters remaining:

Feedback Message