External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

3.4.2. Arria® 10 EMIF Architecture: I/O Column

Arria® 10 devices have two I/O columns, which contain the hardware related to external memory interfaces.
Each I/O column contains the following major parts:
  • A hardened Nios processor with dedicated memory. This Nios block is referred to as the I/O AUX.
  • Up to 13 I/O banks. Each I/O bank contains the hardware necessary for an external memory interface.
Figure 82. I/O Column