External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

9.2. Avalon-MM and Memory Data Width

The following table lists the data width ratio between the memory interface and the Avalon-MM interface.

QDR-IV memory devices use a burst length of 2. Because the Avalon-MM interface must supply all of the data for the entire memory burst in a single controller clock cycle, the Avalon-MM data width of the controller is double the memory data width. For width-expanded configurations, the data width is further multiplied by the expansion factor.

Table 105.  Data Width Ratio

Memory Burst Length

Controller

2

2:1