External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

10.3. Avalon-MM and Memory Data Width

The following table lists the data width ratio between the memory interface and the Avalon-MM interface. The half-rate controller does not support burst-of-2 devices because it under-uses the available memory bandwidth.
Table 107.  Data Width Ratio

Memory Burst Length

Half-Rate Designs

Full-Rate Designs

2-word

No Support

2:1

4-word

4:1

8-word

Did you find the information on this page useful?

Characters remaining:

Feedback Message