External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Document Table of Contents

3.23.22. sbcfg8: Sideband Configuration

address=7(32 bit)

Field Bit High Bit Low Description Access
cfg_reserve 15 1 General purpose reserved register. Read/Write
cfg_ddr4_mps_addrmirror 0 0 When asserted, indicates DDR4 Address Mirroring is enabled for MPS. Read/Write

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