External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

3.23.17. sbcfg3: Sideband Configuration

address=26(32 bit)

Field Bit High Bit Low Description Access
cfg_sb_ddr4_mr3 19 0 This register stores the DDR4 MR3 Content. Read/Write