External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

3.23.16. sbcfg2: Sideband Configuration

address=25(32 bit)

Field Bit High Bit Low Description Access
cfg_srf_zqcal_disable 0 0 Set to 1 to disable ZQ Calibration after self refresh. Read/Write
cfg_mps_zqcal_disable 1 1 Set to 1 to disable ZQ Calibration after Maximum Power Saving exit. Read/Write
cfg_mps_dqstrk_disable 2 2 Set to 1 to disable DQS Tracking after Maximum Power Saving exit. Read/Write
cfg_sb_cg_disable 3 3 Set to 1 to disable mem_ck gating during self refresh and deep power down. Clock gating is not supported when the Ping Pong PHY feature is enabled. Do not enable clock gating for Ping Pong PHY interfaces. Read/Write
cfg_user_rfsh_en 4 4 Setting to 1 to enable user refresh. Read/Write
cfg_srf_autoexit_en 5 5 Setting to 1 to enable controller to exit Self Refresh when new command is detected. Read/Write
cfg_srf_entry_exit_block 7 6 Blocking arbiter from issuing cmds for the 4 cases, 2 Read/Write