External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

3.2. Key Differences Compared to UniPHY IP and Previous Device Families

The Arria® 10 EMIF IP has a new design which bears several notable differences compared to UniPHY-based IP. If you are familiar with the UniPHY-based IP, you should review the following differences, as they affect the way you generate, instantiate, and use the Arria® 10 EMIF IP.
  • Unlike the UniPHY-based IP, which presents a protocol-specific parameter editor for each supported memory protocol, the Arria® 10 EMIF IP uses one parameter editor for all memory protcols.
  • With UniPHY-based IP, you must run the <variation_name>_pin_assignments.tcl script following synthesis, to apply I/O assignments to the project's .qsf file. In Arria® 10 EMIF IP, the <variation_name>_pin_assignments.tcl script is no longer necessary. All the I/O assignments are included in the generated .qip file, which the Quartus Prime software processes during compilation. Assignments that you make in the .qsf file override those in the .qip file.
  • The Arria® 10 EMIF IP includes a <variation_name>readme.txt file, located in the / altera_emif_arch_nf_<version> directory. This file contains important information about the implementation of the IP, including pin location guidelines, information on resource sharing, and signal descriptions.
  • To generate the synthesis example design or the simulation example design, you need to run additional scripts after generation.

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